• Home
  • EASii IC announces the first silicon for its DVB-S2X ASIC satellite modem
1684291501 EASii IC announces the first silicon for its DVB S2X ASIC | x-3-x

EASii IC announces the first silicon for its DVB-S2X ASIC satellite modem

EASii IC announces its satellite modem ASIC, EZID211 also known as Oxford-2. The Oxford-2 is aimed at the terrestrial segment satellite communications market. Targeted applications include: Internet via satellite user terminals covering GEO, MEO and LEO constellations, aircraft, earth observation, cellular backhaul, IP trunking, IOT and many other applications. The Oxford-2 complies with the DVB-S2 ETSI EN 302 307-2 standard and implements the latest S2X, adaptive coding and modulation (ACM), very low signal to noise ratio (VLSNR) and super frame capabilities.

The receiver section includes a dual L-band tuner and two high symbol rate demodulators. The RF inputs support the 950-2150 MHz frequency range, while the demodulators are capable of demodulating signals from less than 1 Msps up to 500 Msps in symbol rates. Data throughput of up to 720 million channel bits per second (uncorrected data) is supported for each demodulation chain providing an aggregate user throughput greater than 1 Gbit per second for the chip as a whole. Multiple Oxford ICs can be used in tandem if higher speeds are required. VLSNR capabilities allow for signal reception from approximately -10dB while the highest coding mode (256APSK) allows for a carrier-to-noise ratio of up to 20dB, the standard defines over 90 modulation and coding combinations allowing for fine-grained optimization of efficiency versus robustness over a wide range of reception conditions.

EVB Oxford 2

The device includes a transmission chain implementing an IQ streamer, an S2X modulator, and an RCS2 modulator.

Many of the peripheral functions such as the crystal oscillator, antenna control and power supplies have been integrated to ensure the lowest cost of implementation and ownership. For example, the device integrates a NCR (Network Clock Recovery) subsystem used to synchronize the return channel burst mode signals to the satellite. In addition, a choice of LVDS and RGMii interfaces is provided to suit both high-performance FPGA-based and low-cost microprocessor-based applications.

The device is fabricated on a 40nm low power CMOS process and packaged in a 13x13mm VQFPN-mr 168 package. Power consumption is a function of throughput and reception conditions and ranges from less than 2 Watts up to 5 Watts at full load.

The first silicon was received in the EASii IC laboratories in mid-September 2022 and has now successfully passed all functional checks. The complete validation, characterization and industrialization phase has now begun. Series production for selected customers is planned for the first half of 2023.

The device will be presented at the Electronica trade fair in Munich on November 16 and 17 in Hall 2, Stand 148.

For more information and customer inquiries please visit our web page https://easii-ic.com/

Business manager
+33 6 71 52 41 89

About IC EASii
EASii IC is a private company registered in France that develops custom ASICs, electronic systems in the fields of consumer electronics, space, aeronautics, telecommunications, industry, automotive and medicine.